Announcement of a new collaboration between the Open Compute Project Foundation and JEDEC

Open Compute Project Foundation (OCP), a nonprofit organization dedicated to making hyperscale innovation accessible to all. This week announced a new collaboration with the JEDEC Semiconductor Technology Association to lay the groundwork for transferring technology from an OCPapproved specification to JEDEC for inclusion in one of its standards.

Cliff Grossner, Ph.D., vice president of market intelligence and innovation at the Open Compute Project Foundation.

“One of OCP’s key efforts is focused on the need for specialized computing for AI and machine learning workloads, leading to the need for specialized silicon. We believe that to meet the demand for custom chips while enabling a rapid pace of innovation, a new open chiplet economy with a low barrier to entry is needed that will require collaboration and standardization on many fronts, ensuring that companies can interoperate in a single environment. in an open, efficient and scalable manner. OCP has been investing in the catalyst for the open chiplet economy for several years through its Open Domain Specific Architecture (ODSA) project and is pleased to forge this alliance with JEDEC to allow work done at ODSA to become part of a global international standard. which advances the industry,” said

Foundation for Open Computing Projects

“Within this new alliance, ongoing efforts will be to provide a mechanism to standardize chiplet part descriptions using the OCP Chiplet Data Extensible Markup Language (CDXML) specification to become part of the JEDEC JEP30: Part Modeling Guide for use with modern tools EDA. With this updated JEDEC standard, which is expected to be published in 2023, chipset manufacturers will be able to provide their customers with standardized chipset parts descriptions electronically, paving the way for systeminpacket (SiP) design and assembly automation using chiplets. The description will include information needed by SiP designers such as chiplet thermal properties, physical and mechanical requirements, behavioral characteristics, signal power and integrity characteristics, packaged chiplet testing, and safety parameters.

Tom Hackenberg, Principal Analyst, Computing & Software Semiconductor, Memory and Computing Division, Yole Group

“The silicon supply chain is diverse. It is to serve many vertical segments of electronic equipment, including automotive, personal data processing, data centers and enterprise data processing, communications and infrastructure, medical, defense, aerospace and industrial industries. Each market includes different meanings and requirements for specific applications that need to be served. Processor vendors have turned to highly heterogeneous chip platforms to stay competitive.

This approach is becoming increasingly complex and costly to manufacture. In response to these challenges, chip manufacturers have begun using chiplets. However, the same variety that has created the demand for chiplets also makes it unlikely that any one vendor has the extensive experience to serve all of these markets.

Thus, many different chipset supply chains will appear, and no single solution will serve all markets. The emerging chiplet market will need many players and a low barrier to entry to enable rapid innovation. Open communities working together to create common tools, prototypes, business processes, and standardization are critical to accelerating the chiplet economy.

Source: TPU

Headings: Technology news, Main news

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