New chips from IBM and Samsung could extend phone battery life by a week

Imagine a world where your smartphone’s battery light never, if ever, turns red. This is the promise that IBM and Samsung are carrying with their new prototype chips. The two tech giants presented a new “breakthrough” in vertical transistor design on Thursday. A revolutionary discovery that, according to them, could transform the semiconductor industry and extend Moore’s Law for a few years.

Both companies present the vertical transistor design as a huge advantage for smartphones, with the latter having the potential to reduce power consumption by 85% compared to finite field effect transistors (finFETs) used in chips. current.

What to end with the current paradigm, marked according to IBM researchers by the fact that engineers lack space since the chips, always smaller, become more dense in transistors. A physical restriction that blocks the way of progress for integrated circuit chips according to Moore’s Law, which assumed that the density of chips would double every two years.

A revolutionary new design

The new vertical design, called Vertical Transport Field Effect Transistors (VTFETs), places transistors perpendicular to the chip rather than horizontally on a layered wafer, so that electrical currents flow vertically rather than laterally through the transistors. VTFET allows engineers to integrate more transistors in a given space than with FinFET. IBM believes that VTFET has the potential to keep Moore’s Law alive for “years to come.”

The vertical design was developed by IBM Research and Samsung as part of IBM’s Albany Research Alliance. “This new approach addresses barriers to scaling by relaxing physical constraints on transistor gate length, spacer thickness, and contact size, so that these characteristics can be optimized for either performance or power consumption. energy, “says IBM Research in a blog post.

The VTFET is part of IBM’s efforts in recent years to design small chips and follows the May announcement of a 2nm chip design. The US giant’s 2nm test chip can hold 50 billion fingernail-sized transistors. IBM created its 5nm chip in 2017.

Change current offer

The element that limits the number of transistors that can be packed into a FinFET chip is the physical space occupied by spacers, gates, and contacts. The “Contacted Gate Step” (CGP) is where the components fit together.

IBM and Samsung have shown that they can use “larger source / drain contacts to increase current to the device.” They can also adjust the length of the network to optimize drive current and device leakage, while the thickness of the spacer can be adjusted independently to reduce capacitance, according to IBM Research.

“By directing the flow of electrical current vertically, the doors, spaces and contacts are no longer restricted in the traditional way: we have the possibility to evolve the CGP while maintaining a healthy size of transistors, contacts and insulations”, explains IBM Research in a blog post. Other potential power-saving applications could be compute-intensive operations such as cryptocurrency and data encryption. IBM also plans to use it to extend the life of the low-power peripheral computers that make up the Internet of Things.

Source: .com